Silicon-based quantum information processing devices, such as those described in EP 2 075 745 A1, can offer many advantages, such as scalability and ease of fabrication. However, the multi-valley character of the conduction band structure in silicon suffers a drawback because it can be difficult to create an electron state in a silicon quantum dot that is sufficiently separated from other states due to small intervalley splitting. Usually this splitting is much smaller than 1 meV and reports show that it is extremely difficult to increase this splitting even up to 10 meV. Different ways have been proposed to increase the splitting from a usual value in the range of 0.01 to 0.1 meV to up to 1 meV and to 10 meV. For example, Srijit Goswami et. al.: “Controllable valley splitting in silicon quantum devices”, Nature Physics, volume 3, pages 41 to 45 (2007) proposes a scheme which uses rough silicon/silicon germanium interfaces to increase splitting up to 1.5 meV and Lijun Zhang et. al.: “Genetic Design of Enhanced Valley Splitting towards a Spin Qubit in Silicon”, Nature Communications, volume 4, 2396 (2013) proposes a scheme to increase the splitting to up to 9 meV by using a specific sequence of silicon and germanium layers. Reference is also made to J. Noborisaka, K. Nishiguchi & A. Fujiwara: “Electric tuning of direct-indirect optical transitions in silicon”, Scientific Reports, Article number: 6950 (2014).
Small intervalley splitting has the potential to limit the use of silicon-based quantum information processing devices (as well as other types of silicon-based devices employing quantum dots) at high temperatures, in particular at room temperature, and even at a low temperatures, for example temperatures at or below 4.2 K.